Powerlink Managing Node IP Core for Design-In Solutions
By using IXXATs Powerlink FPGA IP Core, the Powerlink Managing Node (MN) functionality can be implemented rapidly and cost effective into any kind of host system. The MN IP Core combines the Powerlink functionality and can be implemented, as hardware and software functional unit, into any target system without any risk and with guaranteed performance.
The major advantages of the FPGA based implementation are the flexibility, the vendor independency, the reduced development time and the low development costs. Furthermore, the reconfiguration possibility of the FPGA solution allows the implementation of various real-time Ethernet based protocols on the same hardware platform.
Besides the Powerlink functionality, the MN IP Core includes a standard Ethernet controller, an Ethernet hub and a PCI controller for the host communication.
The MN IP Core was already successfully implemented on the Powerlink PC interface from IXXAT. The board offers a powerful and cost effective solution to set-up PC based automation systems based on Powerlink.
The MN IP core board ensures response times in the range of the Ethernet interframe gap, independent of the number of network nodes. The synchronization by the start of cycle frames is done with a jitter of less than 50 ns. Therefore it is possible to operate systems with cycle times of 200 µs or with up to 240 controlled nodes.
The PCI interface provides a simple application programming interface including process image to the host application and a control and status interface. Based on that, it is easy to connect PC applications to the Powerlink network, like a soft SPS.
Range of application
- PC independent Powerlink MN implementation
- Extension of any host controller with powerful Powerlink MN functionality
- Implementation of customer specific Powerlink MN solutions at a reasonable price
Technical date / Features
- Design-in solution for Altera Cyclone 2C20 or higher
- Support of MN/CN functionality according to the Powerlink specification DS 1.0.0
- PCI slave controller according to the specification 2.2 (32 Bit / 33 MHz)
- Synchronous SRAM interface
- 2 port hub
- MII interface for lowest possible Ethernet delay times
- Synchronization of several MN IP cores via external sync line
Scope of delivery
- Reference circuit diagram
- Encrypted net list
- 10 runtime licenses for prototype implementations
- Host API in ANSI-C source code
- Manual
Further Information
Besides the Powerlink MN IP Core and the Powerlink PCI board, IXXAT offers the development of customer specific Powerlink MN connections, consulting services and training.